Embodiments described herein relate generally to processing set bit values within a vector, and, in particular, to indexing set bit values within a long vector associated with a switch fabric within a network.
Known algorithms can take a relatively long period of time (e.g., many clock cycles) to index a set bit value in a vector. Indexing the set bit value can include, for example, searching for the set bit value, identifying the set bit value, and/or defining an index vector based on the set bit value. If multiple bit values are included in the vector and/or if the vector has a relatively long bitwise length (e.g., a bitwise length greater than 16 bits), the indexing time of these known algorithms can be increased (e.g., significantly increased). These known algorithms, although relatively inefficient, may be sufficient when used in some microprocessor applications. In high speed processing systems, however, where efficiently indexing set bit values within a relatively long vector is desirable, these known algorithms may not be adequate. For example, if indexing set bit values related to data packets during packet classification for a switch fabric is too slow, forwarding of the packets through the switch fabric based on the packet classification can be delayed in an undesirable fashion. As a result, the switch fabric can become congested and some of the packets may even be lost.
Thus, a need exists for methods and apparatus for indexing set bit values within a relatively long vector to address the shortfalls of existing set bit value indexing techniques.